1. Field of the Invention
The present invention relates to a probe method.
2. Description of the Related Art
As one of the measurements in a semiconductor manufacturing process such as an integrated circuit (IC) and the like, a probe measurement is used. In the probe measurement, an object to be measured, such as a semiconductor chip, which is completed by a pattern formation on a semiconductor wafer, is electrically connected to a measuring circuit (tester) included in a measuring apparatus by use of a probe needle, so that an electrical characteristic is measured.
Conventionally, a general probe apparatus comprises a measuring stage and a loader for loading and transferring a wafer onto the measuring stage.
Recently, there has been proposed a probe apparatus comprising at least two measuring stages and one loader in one probe apparatus so as to efficiently use a space of an expensive clean room, and improve a throughput in the measuring step (for example, Published Unexamined Japanese Patent No. 62 35212). In this probe apparatus, the loader is arranged in the central portion, and the measuring stages are respectively arranged in right and left sides. The semiconductor wafers are dispersed to the right and left sides from the loader, so that two measuring stages are efficiently used to improve the throughput.
In the measuring step, there is a case in which the same kind of wafer is measured in a different measuring mode. Conventionally, if the measuring is performed in the different mode, a different probe apparatus is used. However, if a plurality of apparatuses are provided in the clean room, the clean room having a large space must be provided, so that the cost of equipment increases.
Moreover, the above probe apparatus having a plurality of measuring stages aims to improve the throughput by dispersing the wafers stored in a cassette to the right and left stages. Therefore, it was not considered that the measuring in the different measuring mode must be performed in each measuring stage.